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CMSIS-Driver
Version 2.00
Peripheral Interface for Middleware and Application Code
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Specify transmission mode of the MCI. More...
Macros | |
#define | ARM_MCI_BUS_SPEED (0x01) |
Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. | |
#define | ARM_MCI_BUS_SPEED_MODE (0x02) |
Set Bus Speed Mode as specified with arg. | |
#define | ARM_MCI_BUS_CMD_MODE (0x03) |
Set CMD Line Mode as specified with arg. | |
#define | ARM_MCI_BUS_DATA_WIDTH (0x04) |
Set Bus Data Width as specified with arg. | |
#define | ARM_MCI_DRIVER_STRENGTH (0x05) |
Set SD UHS-I Driver Strength as specified with arg. | |
#define | ARM_MCI_CONTROL_CLOCK (0x06) |
Control Clock generation on CLK Pin; arg = 0:disabled, 1:enabled. | |
#define | ARM_MCI_CONTROL_CLOCK_IDLE (0x07) |
Control Clock generation on CLK Pin when idle; arg = 0:disabled, 1:enabled. | |
#define | ARM_MCI_DATA_TIMEOUT (0x0A) |
Set Data timeout; arg = timeout in bus cycles. | |
#define | ARM_MCI_CSS_TIMEOUT (0x0B) |
Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. | |
#define | ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0C) |
Monitor SD I/O interrupt: arg = 0:disabled, 1:enabled. | |
#define | ARM_MCI_CONTROL_READ_WAIT (0x0D) |
Control Read/Wait for SD I/O; arg = 0:disabled, 1:enabled. | |
#define | ARM_MCI_SUSPEND_TRANSFER (0x0E) |
Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. | |
#define | ARM_MCI_RESUME_TRANSFER (0x0F) |
Resume Data transfer (SD I/O) | |
Specify transmission mode of the MCI.
The following codes are used as values for parameter control with the function ARM_MCI_Control to setup the MCI interface.
#define ARM_MCI_BUS_CMD_MODE (0x03) |
Set CMD Line Mode as specified with arg.
#define ARM_MCI_BUS_DATA_WIDTH (0x04) |
Set Bus Data Width as specified with arg.
#define ARM_MCI_BUS_SPEED (0x01) |
Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s.
#define ARM_MCI_BUS_SPEED_MODE (0x02) |
Set Bus Speed Mode as specified with arg.
#define ARM_MCI_CONTROL_CLOCK (0x06) |
Control Clock generation on CLK Pin; arg = 0:disabled, 1:enabled.
#define ARM_MCI_CONTROL_CLOCK_IDLE (0x07) |
Control Clock generation on CLK Pin when idle; arg = 0:disabled, 1:enabled.
ARM_MCI_Control ARM_MCI_UHS_TUNING_OPERATION ARM_MCI_Control ARM_MCI_UHS_TUNING_RESULT ARM_MCI_Control
#define ARM_MCI_CONTROL_READ_WAIT (0x0D) |
Control Read/Wait for SD I/O; arg = 0:disabled, 1:enabled.
#define ARM_MCI_CSS_TIMEOUT (0x0B) |
Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles.
#define ARM_MCI_DATA_TIMEOUT (0x0A) |
Set Data timeout; arg = timeout in bus cycles.
#define ARM_MCI_DRIVER_STRENGTH (0x05) |
Set SD UHS-I Driver Strength as specified with arg.
#define ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0C) |
Monitor SD I/O interrupt: arg = 0:disabled, 1:enabled.
#define ARM_MCI_RESUME_TRANSFER (0x0F) |
Resume Data transfer (SD I/O)
#define ARM_MCI_SUSPEND_TRANSFER (0x0E) |
Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer.