00040 {
00041
00042 make_output(PORTC, 5);
00043 make_input(PORTC, 4);
00044
00045 #ifdef SPI_HW_MASTER_MODE
00046 make_output(PORTC, 3);
00047 clear_bit(sspcon1, 3);
00048 clear_bit(sspcon1, 2);
00049 #ifdef SPI_HW_MASTER_CLOCK_TMR2_DIV_2
00050 set_bit(sspcon1, 1);
00051 set_bit(sspcon1, 0);
00052 #endif
00053 #ifdef SPI_HW_MASTER_CLOCK_FOSC_DIV_64
00054 set_bit (sspcon1, 1);
00055 clear_bit(sspcon1, 0);
00056 #endif
00057 #ifdef SPI_HW_MASTER_CLOCK_FOSC_DIV_16
00058 clear_bit(sspcon1, 1);
00059 set_bit (sspcon1, 0);
00060 #endif
00061 #ifdef SPI_HW_MASTER_CLOCK_FOSC_DIV_4
00062 clear_bit(sspcon1, 1);
00063 clear_bit(sspcon1, 0);
00064 #endif
00065 #else
00066
00067 make_input(PORTC, 3);
00068 clear_bit(sspcon1, 3);
00069 set_bit (sspcon1, 2);
00070 clear_bit(sspcon1, 1);
00071 #ifdef SPI_HW_USE_SS
00072 make_input(PORTA, 5);
00073 clear_bit(sspcon1, 0);
00074 #else
00075 set_bit(sspcon1, 0);
00076 #endif
00077 #endif
00078
00079 }