spi_hw.h File Reference

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Functions

void spi_hw_init ()
uns8 spi_hw_master_receive ()
void spi_hw_master_transmit (uns8 data)
void spi_hw_setup_io ()

Detailed Description

Serial Peripheral Interface (HW) routines

Put the following into your config.h

define SPI_HW_MASTER_MODE or define SPI_HW_SLAVE_MODE

In slave mode, we can use ss: define SPI_HW_USE_SS

In master mode, we need to define clock define SPI_HW_MASTER_CLOCK_TMR2_DIV_2 define SPI_HW_MASTER_CLOCK_FOSC_DIV_64 define SPI_HW_MASTER_CLOCK_FOSC_DIV_16 define SPI_HW_MASTER_CLOCK_FOSC_DIV_4

define SPI_HW_TRANSMIT_ON_ACT_TO_IDLE or define SPI_HW_TRANSMIT_ON_IDLE_TO_ACT

define SPI_HW_CLK_IDLE_IS_HIGH or define SPI_HW_CLK_IDLE_IS_LOW


Function Documentation

void spi_hw_init (  ) 

00082                    {
00083     // for 0,0 mode
00084     clear_bit(sspcon1, CKP);
00085 
00086     set_bit(sspstat, CKE);
00087     set_bit(sspstat, SMP);  // from tim
00088     set_bit(sspcon1, SSPEN);    // enable mssp serial port
00089 }

uns8 spi_hw_master_receive (  ) 

00141                              {
00142 
00143     spi_hw_master_transmit(0x00);   // dummy transmit to get something back
00144     return sspbuf;
00145     
00146 }

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void spi_hw_master_transmit ( uns8  data  ) 

00126                                        {
00127 
00128     clear_bit(pir1, SSPIF);
00129     // Try and send, if we have something already sending, try again
00130     do {
00131         clear_bit(sspcon1, WCOL);
00132         sspbuf = data;
00133     } while (test_bit(sspcon1, WCOL));
00134     
00135     // Wait here while we transmit
00136     // Note that we will hang here if we don't have SPI setup properly
00137     // or we're running under the simulator
00138     while (!test_bit(pir1, SSPIF)) {}
00139 }

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void spi_hw_setup_io (  ) 

00040                        {
00041 
00042 make_output(PORTC, 5);
00043 make_input(PORTC, 4);
00044 
00045 #ifdef SPI_HW_MASTER_MODE
00046     make_output(PORTC, 3);
00047     clear_bit(sspcon1, 3);
00048     clear_bit(sspcon1, 2);
00049     #ifdef SPI_HW_MASTER_CLOCK_TMR2_DIV_2
00050         set_bit(sspcon1, 1);
00051         set_bit(sspcon1, 0);
00052     #endif
00053     #ifdef SPI_HW_MASTER_CLOCK_FOSC_DIV_64
00054         set_bit  (sspcon1, 1);
00055         clear_bit(sspcon1, 0);
00056     #endif
00057     #ifdef SPI_HW_MASTER_CLOCK_FOSC_DIV_16
00058         clear_bit(sspcon1, 1);
00059         set_bit  (sspcon1, 0);
00060     #endif
00061     #ifdef SPI_HW_MASTER_CLOCK_FOSC_DIV_4
00062         clear_bit(sspcon1, 1);
00063         clear_bit(sspcon1, 0);
00064     #endif
00065 #else
00066     // Slave mode
00067     make_input(PORTC, 3);   // sck
00068     clear_bit(sspcon1, 3);
00069     set_bit  (sspcon1, 2);
00070     clear_bit(sspcon1, 1);
00071     #ifdef SPI_HW_USE_SS
00072         make_input(PORTA, 5);   // SS
00073         clear_bit(sspcon1, 0);
00074     #else
00075         set_bit(sspcon1, 0);
00076     #endif
00077 #endif
00078 
00079 }   


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