mrf24j40_defines.h File Reference
Defines for MRF24J40 chip - generated from the datasheet.
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Detailed Description
Define Documentation
#define ACKTMOUT_DRPACK 7 |
#define BBREG1_RXDECINV 2 |
#define BBREG2_CCACSTH0 2 |
#define BBREG2_CCACSTH1 3 |
#define BBREG2_CCACSTH2 4 |
#define BBREG2_CCACSTH3 5 |
#define BBREG2_CCAMODE0 6 |
#define BBREG2_CCAMODE1 7 |
#define BBREG3_PREDETTH0 1 |
#define BBREG3_PREDETTH1 2 |
#define BBREG3_PREDETTH2 3 |
#define BBREG3_PREVALIDTH0 4 |
#define BBREG3_PREVALIDTH1 5 |
#define BBREG3_PREVALIDTH2 6 |
#define BBREG3_PREVALIDTH3 7 |
#define BBREG6_RSSIMODE1 7 |
#define BBREG6_RSSIMODE2 6 |
#define CCAEDTH_CCAEDTH0 0 |
#define CCAEDTH_CCAEDTH1 1 |
#define CCAEDTH_CCAEDTH2 2 |
#define CCAEDTH_CCAEDTH3 3 |
#define CCAEDTH_CCAEDTH4 4 |
#define CCAEDTH_CCAEDTH5 5 |
#define CCAEDTH_CCAEDTH6 6 |
#define CCAEDTH_CCAEDTH7 7 |
#define FRMOFFSET_OFFSET0 0 |
#define FRMOFFSET_OFFSET1 1 |
#define FRMOFFSET_OFFSET2 2 |
#define FRMOFFSET_OFFSET3 3 |
#define FRMOFFSET_OFFSET4 4 |
#define FRMOFFSET_OFFSET5 5 |
#define FRMOFFSET_OFFSET6 6 |
#define FRMOFFSET_OFFSET7 7 |
#define HSYMTMRH_HSYMTMR08 0 |
#define HSYMTMRH_HSYMTMR09 1 |
#define HSYMTMRH_HSYMTMR10 2 |
#define HSYMTMRH_HSYMTMR11 3 |
#define HSYMTMRH_HSYMTMR12 4 |
#define HSYMTMRH_HSYMTMR13 5 |
#define HSYMTMRH_HSYMTMR14 6 |
#define HSYMTMRH_HSYMTMR15 7 |
#define HSYMTMRL_HSYMTMR0 0 |
#define HSYMTMRL_HSYMTMR1 1 |
#define HSYMTMRL_HSYMTMR2 2 |
#define HSYMTMRL_HSYMTMR3 3 |
#define HSYMTMRL_HSYMTMR4 4 |
#define HSYMTMRL_HSYMTMR5 5 |
#define HSYMTMRL_HSYMTMR6 6 |
#define HSYMTMRL_HSYMTMR7 7 |
#define INTSTAT_HSYMTMRIF 5 |
#define MAINCNT0_MAINCNT0 0 |
#define MAINCNT0_MAINCNT1 1 |
#define MAINCNT0_MAINCNT2 2 |
#define MAINCNT0_MAINCNT3 3 |
#define MAINCNT0_MAINCNT4 4 |
#define MAINCNT0_MAINCNT5 5 |
#define MAINCNT0_MAINCNT6 6 |
#define MAINCNT0_MAINCNT7 7 |
#define MAINCNT1_MAINCNT10 2 |
#define MAINCNT1_MAINCNT11 3 |
#define MAINCNT1_MAINCNT12 4 |
#define MAINCNT1_MAINCNT13 5 |
#define MAINCNT1_MAINCNT14 6 |
#define MAINCNT1_MAINCNT15 7 |
#define MAINCNT1_MAINCNT8 0 |
#define MAINCNT1_MAINCNT9 1 |
#define MAINCNT2_MAINCNT16 0 |
#define MAINCNT2_MAINCNT17 1 |
#define MAINCNT2_MAINCNT18 2 |
#define MAINCNT2_MAINCNT19 3 |
#define MAINCNT2_MAINCNT20 4 |
#define MAINCNT2_MAINCNT21 5 |
#define MAINCNT2_MAINCNT22 6 |
#define MAINCNT2_MAINCNT23 7 |
#define MAINCNT3_MAINCNT24 0 |
#define MAINCNT3_MAINCNT25 1 |
#define MAINCNT3_STARTCNT 7 |
#define MRF_INTCON_HSYMTMRIE 5 |
#define MRF_INTCON_RXIE 3 |
#define MRF_INTCON_SECIE 4 |
#define MRF_INTCON_SLPIE 7 |
#define MRF_INTCON_TXG1IE 1 |
#define MRF_INTCON_TXG2IE 2 |
#define MRF_INTCON_TXNIE 0 |
#define MRF_INTCON_WAKEIE 6 |
#define REMCNTH_REMCNT10 2 |
#define REMCNTH_REMCNT11 3 |
#define REMCNTH_REMCNT12 4 |
#define REMCNTH_REMCNT13 5 |
#define REMCNTH_REMCNT14 6 |
#define REMCNTH_REMCNT15 7 |
#define REMCNTH_REMCNT8 0 |
#define REMCNTH_REMCNT9 1 |
#define REMCNTL_REMCNT0 0 |
#define REMCNTL_REMCNT1 1 |
#define REMCNTL_REMCNT2 2 |
#define REMCNTL_REMCNT3 3 |
#define REMCNTL_REMCNT4 4 |
#define REMCNTL_REMCNT5 5 |
#define REMCNTL_REMCNT6 6 |
#define REMCNTL_REMCNT7 7 |
#define RFCON0_CHANNEL0 4 |
#define RFCON0_CHANNEL1 5 |
#define RFCON0_CHANNEL2 6 |
#define RFCON0_CHANNEL3 7 |
#define RFCON6_20MRECVR 4 |
#define RFCON7_CLKOUTMODE0 0 |
#define RFCON7_CLKOUTMODE1 1 |
#define RFCON7_SLPCLKSEL0 6 |
#define RFCON7_SLPCLKSEL1 7 |
#define RFSTATE_RFSTATE0 5 |
#define RFSTATE_RFSTATE1 6 |
#define RFSTATE_RFSTATE2 7 |
#define RXFLUSH_BCNONLY 1 |
#define RXFLUSH_CMDONLY 3 |
#define RXFLUSH_DATAONLY 2 |
#define RXFLUSH_RXFLUSH 0 |
#define RXFLUSH_WAKEPAD 5 |
#define RXFLUSH_WAKEPOL 6 |
#define SECCON0_RXCIPHER0 3 |
#define SECCON0_RXCIPHER1 4 |
#define SECCON0_RXCIPHER2 5 |
#define SECCON0_SECIGNORE 7 |
#define SECCON0_SECSTART 6 |
#define SECCON0_TXNCIPHER0 0 |
#define SECCON0_TXNCIPHER1 1 |
#define SECCON0_TXNCIPHER2 2 |
#define SECCON1_TXBCIPHER0 4 |
#define SECCON1_TXBCIPHER1 5 |
#define SECCON1_TXBCIPHER2 6 |
#define SECCR2_TXG1CIPHER0 0 |
#define SECCR2_TXG1CIPHER1 1 |
#define SECCR2_TXG1CIPHER2 2 |
#define SECCR2_TXG2CIPHER0 3 |
#define SECCR2_TXG2CIPHER1 4 |
#define SECCR2_TXG2CIPHER2 5 |
#define SLPACK_WAKECNT0 0 |
#define SLPACK_WAKECNT1 1 |
#define SLPACK_WAKECNT2 2 |
#define SLPACK_WAKECNT3 3 |
#define SLPACK_WAKECNT4 4 |
#define SLPACK_WAKECNT5 5 |
#define SLPACK_WAKECNT6 6 |
#define SLPCAL0_SLPCAL0 0 |
#define SLPCAL0_SLPCAL1 1 |
#define SLPCAL0_SLPCAL2 2 |
#define SLPCAL0_SLPCAL3 3 |
#define SLPCAL0_SLPCAL4 4 |
#define SLPCAL0_SLPCAL5 5 |
#define SLPCAL0_SLPCAL6 6 |
#define SLPCAL0_SLPCAL7 7 |
#define SLPCAL1_SLPCAL10 2 |
#define SLPCAL1_SLPCAL11 3 |
#define SLPCAL1_SLPCAL12 4 |
#define SLPCAL1_SLPCAL13 5 |
#define SLPCAL1_SLPCAL14 6 |
#define SLPCAL1_SLPCAL15 7 |
#define SLPCAL1_SLPCAL8 0 |
#define SLPCAL1_SLPCAL9 1 |
#define SLPCAL2_SLPCAL16 0 |
#define SLPCAL2_SLPCAL17 1 |
#define SLPCAL2_SLPCAL18 2 |
#define SLPCAL2_SLPCAL19 3 |
#define SLPCAL2_SLPCALEN 4 |
#define SLPCAL2_SLPCALRDY 7 |
#define SLPCON0_INTEDGE 1 |
#define SLPCON0_SLPCLKEN 0 |
#define SLPCON1_CLKOUTEN 5 |
#define SLPCON1_SLPCLKDIV0 0 |
#define SLPCON1_SLPCLKDIV1 1 |
#define SLPCON1_SLPCLKDIV2 2 |
#define SLPCON1_SLPCLKDIV3 3 |
#define SLPCON1_SLPCLKDIV4 4 |
#define SYMTICKH_TICKP8 0 |
#define SYMTICKH_TXONT0 1 |
#define SYMTICKH_TXONT1 2 |
#define SYMTICKH_TXONT2 3 |
#define SYMTICKH_TXONT3 4 |
#define SYMTICKH_TXONT4 5 |
#define SYMTICKH_TXONT5 6 |
#define SYMTICKH_TXONT6 7 |
#define SYMTICKL_TICKP0 0 |
#define SYMTICKL_TICKP1 1 |
#define SYMTICKL_TICKP2 2 |
#define SYMTICKL_TICKP3 3 |
#define SYMTICKL_TICKP4 4 |
#define SYMTICKL_TICKP5 5 |
#define SYMTICKL_TICKP6 6 |
#define SYMTICKL_TICKP7 7 |
#define TESTMODE_RSSIWAIT0 3 |
#define TESTMODE_RSSIWAIT1 4 |
#define TESTMODE_TESTMODE0 0 |
#define TESTMODE_TESTMODE1 1 |
#define TESTMODE_TESTMODE2 2 |
#define TRISGPIO_TRISGP0 0 |
#define TRISGPIO_TRISGP1 1 |
#define TRISGPIO_TRISGP2 2 |
#define TRISGPIO_TRISGP3 3 |
#define TRISGPIO_TRISGP4 4 |
#define TRISGPIO_TRISGP5 5 |
#define TXBCON0_TXBSECEN 1 |
#define TXBCON0_TXBTRIG 0 |
#define TXG1CON_TXG1ACKREQ 2 |
#define TXG1CON_TXG1RETRY0 6 |
#define TXG1CON_TXG1RETRY1 7 |
#define TXG1CON_TXG1SECEN 1 |
#define TXG1CON_TXG1SLOT0 3 |
#define TXG1CON_TXG1SLOT1 4 |
#define TXG1CON_TXG1SLOT2 5 |
#define TXG1CON_TXG1TRIG 0 |
#define TXG2CON_TXG2ACKREQ 2 |
#define TXG2CON_TXG2RETRY0 6 |
#define TXG2CON_TXG2RETRY1 7 |
#define TXG2CON_TXG2SECEN 1 |
#define TXG2CON_TXG2SLOT0 3 |
#define TXG2CON_TXG2SLOT1 4 |
#define TXG2CON_TXG2SLOT2 5 |
#define TXG2CON_TXG2TRIG 0 |
#define TXMCR_BATLIFEXT 6 |
#define TXMCR_MACMINBE0 3 |
#define TXMCR_MACMINBE1 4 |
#define TXNCON_INDIRECT 3 |
#define TXNCON_TXNACKREQ 2 |
#define TXNCON_TXNSECEN 1 |
#define TXPEND_GTSSWITCH 1 |
#define TXSTAT_TXG1STAT 1 |
#define TXSTAT_TXG2STAT 2 |
#define TXSTAT_TXNRETRY0 6 |
#define TXSTAT_TXNRETRY1 7 |
#define TXTIME_TURNTIME0 4 |
#define TXTIME_TURNTIME1 5 |
#define TXTIME_TURNTIME2 6 |
#define TXTIME_TURNTIME3 7 |
#define WAKECON_IMMWAKE 7 |
#define WAKECON_REGWAKE 6 |
#define WAKETIMEH_WAKETIME10 2 |
#define WAKETIMEH_WAKETIME8 0 |
#define WAKETIMEH_WAKETIME9 1 |
#define WAKETIMEL_WAKETIME0 0 |
#define WAKETIMEL_WAKETIME1 1 |
#define WAKETIMEL_WAKETIME2 2 |
#define WAKETIMEL_WAKETIME3 3 |
#define WAKETIMEL_WAKETIME4 4 |
#define WAKETIMEL_WAKETIME5 5 |
#define WAKETIMEL_WAKETIME6 6 |
#define WAKETIMEL_WAKETIME7 7 |