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00037 #include "pic_rf_24l01.h"
00038 #include "pic_serial.h"
00039 #include <stdlib.h>
00040
00041 uns8 pic_rf_receive(uns8 *data, uns8 bytes_to_receive) {
00042
00043 uns8 fifo_status;
00044 uns8 res;
00045
00046 res = 0;
00047
00048
00049
00050
00051 pic_rf_read_register_inline(RF_RD_REG_FIFO_STATUS, &fifo_status, 1);
00052 while (!test_bit(fifo_status, 0)) {
00053
00054 pic_rf_read_register_inline(RF_R_RX_PAYLOAD, data, bytes_to_receive);
00055 pic_rf_send_command_inline(RF_WR_REG_STATUS, "\x40", 1);
00056 res++;
00057 pic_rf_read_register_inline(RF_RD_REG_FIFO_STATUS, &fifo_status, 1);
00058 }
00059
00060
00061
00062 return res;
00063 }
00064
00065
00066 uns8 pic_rf_send_command(uns8 cmd, uns8 *data, uns8 data_len) {
00067
00068 uns8 byte_counter, status;
00069
00070 clear_pin(rf_csn_port, rf_csn_pin);
00071 status = pic_rf_send_byte(cmd);
00072 for(byte_counter = 0 ; byte_counter < data_len ; byte_counter++) {
00073 pic_rf_send_byte(data[byte_counter]);
00074 }
00075
00076 set_pin(rf_csn_port, rf_csn_pin);
00077 return status;
00078 }
00079
00080 uns8 pic_rf_send_command_single(uns8 cmd, uns8 data) {
00081
00082 uns8 byte_counter, status;
00083
00084 clear_pin(rf_csn_port, rf_csn_pin);
00085 status = pic_rf_send_byte(cmd);
00086 pic_rf_send_byte(data);
00087 set_pin(rf_csn_port, rf_csn_pin);
00088 return status;
00089 }
00090
00091
00092 uns8 pic_rf_read_register(uns8 cmd, uns8 *data, uns8 data_len) {
00093
00094 uns8 byte_counter, status;
00095
00096 clear_pin(rf_csn_port, rf_csn_pin);
00097 status = pic_rf_send_byte(cmd);
00098 for(byte_counter = 0 ; byte_counter < data_len ; byte_counter++) {
00099 data[byte_counter] = pic_rf_send_byte(0);
00100 }
00101
00102 set_pin(rf_csn_port, rf_csn_pin);
00103 return status;
00104 }
00105
00106 uns8 pic_rf_read_register_int(uns8 cmd, uns8 *data, uns8 data_len) {
00107
00108 uns8 byte_counter, status;
00109
00110 clear_pin(rf_csn_port, rf_csn_pin);
00111 status = pic_rf_send_byte_int(cmd);
00112 for(byte_counter = 0 ; byte_counter < data_len ; byte_counter++) {
00113 data[byte_counter] = pic_rf_send_byte_int(0);
00114 }
00115
00116 set_pin(rf_csn_port, rf_csn_pin);
00117 return status;
00118 }
00119
00120
00121
00122
00123 uns8 pic_rf_send_byte(uns8 b)
00124 {
00125 uns8 bit_counter, status;
00126
00127 for(bit_counter = 0 ; bit_counter < 8 ; bit_counter++) {
00128 change_pin(rf_mosi_port, rf_mosi_pin, b.7);
00129 set_pin(rf_sck_port, rf_sck_pin);
00130 status <<= 1;
00131 status.0 = test_pin(rf_miso_port, rf_miso_pin);
00132 clear_pin(rf_sck_port, rf_sck_pin);
00133
00134 b <<= 1;
00135 }
00136 return status;
00137 }
00138
00139
00140 uns8 pic_rf_send_byte_int(uns8 b)
00141 {
00142 uns8 bit_counter, status;
00143
00144 for(bit_counter = 0 ; bit_counter < 8 ; bit_counter++) {
00145 change_pin(rf_mosi_port, rf_mosi_pin, b.7);
00146 set_pin(rf_sck_port, rf_sck_pin);
00147 status <<= 1;
00148 status.0 = test_pin(rf_miso_port, rf_miso_pin);
00149 clear_pin(rf_sck_port, rf_sck_pin);
00150
00151 b <<= 1;
00152 }
00153 return status;
00154 }
00155
00156
00157 void pic_rf_quick_init(char *my_config, uns8 my_channel, bit my_receive_on) {
00158
00159
00160 }
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00253 void pic_rf_init(rf_config *my_config)
00254 {
00255 uns8 temp;
00256 uns8 options;
00257 uns8 data[5];
00258
00259 start_crit_sec();
00260
00261 clear_pin(rf_ce_port, rf_ce_pin);
00262 delay_ms(100);
00263
00264 temp = pic_rf_send_command(RF_WR_REG_CONFIG_REG,
00265 "\x3c", 1);
00266
00267
00268
00269 pic_rf_send_command(RF_WR_REG_SETUP_RETR,
00270 "\x00", 1);
00271
00272
00273 pic_rf_send_command(RF_WR_REG_SETUP_AW,
00274 "\x01", 1);
00275
00276
00277 pic_rf_send_command(RF_WR_REG_RF_SETUP,
00278 "\x07", 1);
00279
00280 pic_rf_send_command (RF_WR_REG_RF_CH,
00281 "\x02", 1);
00282
00283 data[0] = 0b11100111;
00284 data[1] = 0b11100111;
00285 data[2] = 0b11100111;
00286 pic_rf_send_command(RF_WR_REG_TX_ADDR,
00287 &data, 3);
00288
00289
00290 pic_rf_send_command(RF_WR_REG_RX_ADDR_P0,
00291 &data, 3);
00292
00293 pic_rf_send_command(RF_WR_REG_EN_AA,
00294 "\x00", 1);
00295
00296
00297
00298
00299 pic_rf_send_command(RF_WR_REG_RX_PW_P0,
00300 "\x15", 1);
00301
00302 pic_rf_send_command(RF_WR_REG_CONFIG_REG,
00303 "\x3f", 1);
00304
00305
00306 delay_ms(2);
00307 pic_rf_send_command (RF_FLUSH_TX,
00308 0, 0 );
00309 pic_rf_send_command (RF_FLUSH_RX,
00310 0, 0 );
00311
00312 pic_rf_send_command_inline(RF_WR_REG_STATUS, "\x40", 1);
00313 delay_ms(2);
00314
00315 set_pin(rf_ce_port, rf_ce_pin);
00316
00317 end_crit_sec();
00318 serial_print_str("got=");
00319 serial_print_int_hex(temp);
00320 serial_print_str(" ");
00321
00322 rf_current_mode_receive = 1;
00323 }
00324
00325
00326 void pic_rf_transmit(uns8 *data, uns8 bytes_to_transmit) {
00327
00328 uns8 byte_count, bit_count, temp, cd;
00329 start_crit_sec();
00330
00331 pic_rf_set_mode(TRANSMIT_MODE);
00332
00333
00334 pic_rf_read_register_inline(RF_RD_REG_CD, &cd, 1);
00335 serial_print_str("\n cd=");
00336 serial_print_int(cd);
00337 serial_print_nl();
00338 pic_rf_send_command(RF_W_TX_PAYLOAD, data, bytes_to_transmit);
00339
00340 set_pin(rf_ce_port, rf_ce_pin);
00341 delay_us(10);
00342 clear_pin(rf_ce_port, rf_ce_pin);
00343 delay_us(130);
00344 pic_rf_set_mode(RECEIVE_MODE);
00345
00346 end_crit_sec();
00347 }
00348 inline void pic_rf_receive_inline(uns8 *data, uns8 bytes_to_receive) {
00349 pic_rf_read_register_inline(RF_R_RX_PAYLOAD, data, bytes_to_receive);
00350 }
00351
00352 void pic_rf_receive2(uns8 *data, uns8 bytes_to_receive) {
00353
00354 pic_rf_receive_inline(data, bytes_to_receive);
00355 }
00356
00357
00358 void pic_rf_set_mode(uns8 requested_mode)
00359 {
00360 uns8 config_reg;
00361
00362 start_crit_sec();
00363
00364 if ((requested_mode == TRANSMIT_MODE) && (rf_current_mode_receive)) {
00365
00366
00367 clear_pin(rf_ce_port, rf_ce_pin);
00368 pic_rf_read_register(RF_RD_REG_CONFIG_REG, &config_reg, 1);
00369 clear_bit(config_reg, CONFIG_PRIM_RX);
00370 pic_rf_send_command(RF_WR_REG_CONFIG_REG, &config_reg, 1);
00371 rf_current_mode_receive = 0;
00372 } else if ((requested_mode == RECEIVE_MODE) && (!rf_current_mode_receive)) {
00373
00374
00375 pic_rf_read_register(RF_RD_REG_CONFIG_REG, &config_reg, 1);
00376 set_bit(config_reg, CONFIG_PRIM_RX);
00377 pic_rf_send_command(RF_WR_REG_CONFIG_REG, &config_reg, 1);
00378 set_pin(rf_ce_port, rf_ce_pin);
00379 rf_current_mode_receive = 1;
00380 }
00381
00382 end_crit_sec();
00383 }
00384
00385 void pic_rf_set_channel(uns8 channel)
00386 {
00387 start_crit_sec();
00388
00389 clear_pin(rf_ce_port, rf_ce_pin);
00390 pic_rf_send_command (RF_WR_REG_RF_CH,
00391 &channel, 1);
00392 if (rf_current_mode_receive) {
00393 set_pin(rf_ce_port, rf_ce_pin);
00394 }
00395 rf_current_channel = channel;
00396
00397 end_crit_sec();
00398 }
00399
00400 void pic_rf_setup() {
00401
00402 make_output(rf_ce_port, rf_ce_pin);
00403 make_output(rf_csn_port, rf_csn_pin);
00404 make_output(rf_sck_port, rf_sck_pin);
00405 make_output(rf_mosi_port, rf_mosi_pin);
00406 make_input (rf_miso_port, rf_miso_pin);
00407 make_input (rf_irq_port, rf_irq_pin);
00408
00409 set_pin(rf_csn_port, rf_csn_pin);
00410 clear_pin(rf_ce_port, rf_ce_pin);
00411 }
00412