ramtest Project Status (10/13/2012 - 11:37:10) | |||
Project File: | RHD2000InterfaceXEM6010.xise | Parser Errors: | No Errors |
Module Name: | ramtest | Implementation State: | Synthesized (Failed) |
Target Device: | xc6slx45-2fgg484 |
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Product Version: | ISE 14.2 |
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Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Environment: |
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Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | ||||||
Translation Report | ||||||
Map Report | ||||||
Place and Route Report | ||||||
CPLD Fitter Report (Text) | ||||||
Power Report | ||||||
Post-PAR Static Timing Report | ||||||
Bitgen Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Report | Out of Date | Sat Oct 13 11:31:13 2012 | |
WebTalk Log File | Out of Date | Sat Oct 13 11:31:18 2012 |