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44 #ifndef ESOS_PIC24_IRQ_H
45 #define ESOS_PIC24_IRQ_H
75 #define ESOS_USER_INTERRUPT(desc) __xESOS_USER_ISR(desc)
76 #define __xESOS_USER_ISR(attrib, ivt, ifsr, ifsb, ipcr, ipcb) void _ISRFAST attrib (void)
93 #define ESOS_USER_IRQ_LEVEL1 6
99 #define ESOS_USER_IRQ_LEVEL2 4
105 #define ESOS_USER_IRQ_LEVEL3 3
111 #define ESOS_USER_IRQ_LEVEL4 2
113 #define __ESOS_USER_IRQ_UNREGISTERED 0
115 #define __ESOS_DISABLE_USER_IRQS_LEVEL ESOS_USER_IRQ_LEVEL2
117 #define __ESOS_ENABLE_USER_IRQS_LEVEL __ESOS_USER_IRQ_UNREGISTERED
142 #if (defined(_INT0IF))
157 #define ESOS_IRQ_PIC24_INT0 _INT0Interrupt, 0x0014, 0, 0, 0, 0 // external interrupt 0
160 #if (defined(_INT1IF))
175 #define ESOS_IRQ_PIC24_INT1 _INT1Interrupt, 0x003C, 1, 4, 5, 0 // external interrupt 1
178 #if (defined(_INT2IF))
193 #define ESOS_IRQ_PIC24_INT2 _INT2Interrupt, 0x004E, 1, 13, 7, 4 // external interrupt 2
196 #if (defined(_INT3IF))
211 #define ESOS_IRQ_PIC24_INT3 _INT3Interrupt, 0x007E, 3, 5, 13, 4 // external interrupt 3
214 #if (defined(_INT4IF))
229 #define ESOS_IRQ_PIC24_INT4 _INT4Interrupt, 0x0080, 3, 6, 13, 8 // external interrupt 4
235 #if (defined(_IC1IF))
250 #define ESOS_IRQ_PIC24_IC1 _IC1Interrupt, 0x0016, 0, 1, 0, 4 // Input capture channel 1
253 #if (defined(_IC2IF))
268 #define ESOS_IRQ_PIC24_IC2 _IC2Interrupt, 0x001E, 0, 5, 1, 4 // Input capture channel 2
272 #if (defined(_IC3IF))
287 #define ESOS_IRQ_PIC24_IC3 _IC3Interrupt, 0x005E, 2, 5, 9, 4 // Input Capture 3
290 #if (defined(_IC4IF))
305 #define ESOS_IRQ_PIC24_IC4 _IC4Interrupt, 0x0060, 2, 6, 9, 8 // Input Capture 4
308 #if (defined(_IC5IF))
323 #define ESOS_IRQ_PIC24_IC5 _IC5Interrupt, 0x0062, 2, 7, 9, 12 // Input capture channel 5
326 #if (defined(_IC6IF))
341 #define ESOS_IRQ_PIC24_IC6 _IC6Interrupt, 0x0064, 2, 8, 10, 0 // Input capture channel 6
344 #if (defined(_IC7IF))
359 #define ESOS_IRQ_PIC24_IC7 _IC7Interrupt, 0x0040, 1, 6, 5, 8 // Input capture channel 7
362 #if (defined(_IC8IF))
377 #define ESOS_IRQ_PIC24_IC8 _IC8Interrupt, 0x0042, 1, 7, 5, 12 // Input capture channel 8
380 #if (defined(_IC9IF))
395 #define ESOS_IRQ_PIC24_IC9 _IC9Interrupt, 0x00CE, 5, 13, 23, 4 // Input capture channel 9
398 #if (defined(_IC10IF))
413 #define ESOS_IRQ_PIC24_IC10 _IC10Interrupt, 0x0010E, 7, 13, 31, 4 // Input capture channel 10
416 #if (defined(_IC11IF))
431 #define ESOS_IRQ_PIC24_IC11 _IC11Interrupt, 0x0112, 7, 15, 31, 12 // Input capture channel 11
434 #if (defined(_IC12IF))
449 #define ESOS_IRQ_PIC24_IC12 _IC12Interrupt, 0x0116, 8, 1, 32, 4 // Input capture channel 12
452 #if (defined(_IC13IF))
467 #define ESOS_IRQ_PIC24_IC13 _IC13Interrupt, 0x0122, 8, 7, 33, 12 // Input capture channel 13
470 #if (defined(_IC14IF))
485 #define ESOS_IRQ_PIC24_IC14 _IC14Interrupt, 0x0126, 8, 9, 34, 4 // Input capture channel 14
488 #if (defined(_IC15IF))
503 #define ESOS_IRQ_PIC24_IC15 _IC15Interrupt, 0x012A, 8, 11, 34, 12 // Input capture channel 15
506 #if (defined(_IC16IF))
521 #define ESOS_IRQ_PIC24_IC16 _IC16Interrupt, 0x012E, 8, 13, 35, 4 // Input capture channel 16
527 #if (defined(_OC1IF))
542 #define ESOS_IRQ_PIC24_OC1 _OC1Interrupt, 0x0018, 0, 2, 0, 8 // Output compare channel 1
545 #if (defined(_OC2IF))
560 #define ESOS_IRQ_PIC24_OC2 _OC2Interrupt, 0x0020, 0, 6, 1, 8 // Output compare channel 2
563 #if (defined(_OC3IF))
578 #define ESOS_IRQ_PIC24_OC3 _OC3Interrupt, 0x0046, 1, 9, 6, 4 // Output Compare 3
581 #if (defined(_OC4IF))
596 #define ESOS_IRQ_PIC24_OC4 _OC4Interrupt, 0x0048, 1, 10, 6, 8 // Output Compare 4
599 #if (defined(_OC5IF))
614 #define ESOS_IRQ_PIC24_OC5 _OC5Interrupt, 0x0066, 2, 9, 10, 4 // Output compare channel 5
617 #if (defined(_OC6IF))
632 #define ESOS_IRQ_PIC24_OC6 _OC6Interrupt, 0x0068, 2, 10, 10, 8 // Output compare channel 6
635 #if (defined(_OC7IF))
650 #define ESOS_IRQ_PIC24_OC7 _OC7Interrupt, 0x006A, 2, 11, 10, 12 // Output compare channel 7
653 #if (defined(_OC8IF))
668 #define ESOS_IRQ_PIC24_OC8 _OC8Interrupt, 0x006C, 2, 12, 11, 0 // Output compare channel 8
671 #if (defined(_OC9IF))
686 #define ESOS_IRQ_PIC24_OC9 _OC9Interrupt, 0x00CC, 5, 12, 23, 0 // Output compare channel 9
689 #if (defined(_OC10IF))
704 #define ESOS_IRQ_PIC24_OC10 _OC10Interrupt, 0x010C, 7, 12, 31, 0 // Output compare channel 10
707 #if (defined(_OC11IF))
722 #define ESOS_IRQ_PIC24_OC11 _OC11Interrupt, 0x0110, 7, 14, 31, 8 // Output compare channel 11
725 #if (defined(_OC12IF))
740 #define ESOS_IRQ_PIC24_OC12 _OC12Interrupt, 0x0114, 8, 0, 32, 0 // Output compare channel 12
743 #if (defined(_OC13IF))
758 #define ESOS_IRQ_PIC24_OC13 _OC13Interrupt, 0x0120, 8, 6, 33, 8 // Output compare channel 13
761 #if (defined(_OC14IF))
776 #define ESOS_IRQ_PIC24_OC14 _OC14Interrupt, 0x0124, 8, 8, 34, 0 // Output compare channel 14
779 #if (defined(_OC15IF))
794 #define ESOS_IRQ_PIC24_OC15 _OC15Interrupt, 0x0128, 8, 10, 34, 8 // Output compare channel 15
797 #if (defined(_OC16IF))
812 #define ESOS_IRQ_PIC24_OC16 _OC16Interrupt, 0x012C, 8, 12, 35, 0 // Output compare channel 16
836 #define ESOS_IRQ_PIC24_T2 _T2Interrupt, 0x0022, 0, 7, 1, 12 // Timer 2
854 #define ESOS_IRQ_PIC24_T3 _T3Interrupt, 0x0024, 0, 8, 2, 0 // Timer 3
872 #define ESOS_IRQ_PIC24_T4 _T4Interrupt, 0x004A, 1, 11, 6, 12 // Timer4
890 #define ESOS_IRQ_PIC24_T5 _T5Interrupt, 0x004C, 1, 12, 7, 0 // Timer5
908 #define ESOS_IRQ_PIC24_T6 _T6Interrupt, 0x0072, 2, 15, 11, 12 // Timer 6
926 #define ESOS_IRQ_PIC24_T7 _T7Interrupt, 0x0074, 3, 0, 12, 0 // Timer 7
944 #define ESOS_IRQ_PIC24_T8 _T8Interrupt, 0x007A, 3, 3, 12, 12 // Timer 8
962 #define ESOS_IRQ_PIC24_T9 _T9Interrupt, 0x007C, 3, 4, 13, 0 // Timer 9
968 #if (defined(_DMA0IF))
983 #define ESOS_IRQ_PIC24_DMA0 _DMA0Interrupt, 0x001A, 0, 4, 1, 0 // DMA Channel 0
986 #if (defined(_DMA1IF))
1001 #define ESOS_IRQ_PIC24_DMA1 _DMA1Interrupt, 0x0030, 0, 14, 3, 8 // DMA Channel 1
1004 #if (defined(_DMA2IF))
1019 #define ESOS_IRQ_PIC24_DMA2 _DMA2Interrupt, 0x0044, 1, 8, 6, 0 // DMA Channel 2
1022 #if (defined(_DMA3IF))
1037 #define ESOS_IRQ_PIC24_DMA3 _DMA3Interrupt, 0x005C, 2, 4, 9, 0 // DMA Channel 3
1040 #if (defined(_DMA4IF))
1055 #define ESOS_IRQ_PIC24_DMA4 _DMA4Interrupt, 0x0070, 2, 14, 11, 8 // DMA Channel 4
1058 #if (defined(_DMA5IF))
1073 #define ESOS_IRQ_PIC24_DMA5 _DMA5Interrupt, 0x008E, 3, 13, 15, 4 // DMA Channel 5
1076 #if (defined(_DMA6IF))
1091 #define ESOS_IRQ_PIC24_DMA6 _DMA6Interrupt, 0x009C, 4, 4, 17, 0 // DMA Channel 6
1094 #if (defined(_DMA7IF))
1109 #define ESOS_IRQ_PIC24_DMA7 _DMA7Interrupt, 0x009E, 4, 5, 17, 4 // DMA Channel 7
1112 #if (defined(_DMA8IF))
1127 #define ESOS_IRQ_PIC24_DMA8 _DMA8Interrupt, 0x0100, 7, 6, 29, 8 // DMA Channel 8
1130 #if (defined(_DMA9IF))
1145 #define ESOS_IRQ_PIC24_DMA9 _DMA9Interrupt, 0x0102, 7, 7, 29, 12 // DMA Channel 9
1148 #if (defined(_DMA10IF))
1163 #define ESOS_IRQ_PIC24_DMA10 _DMA10Interrupt, 0x0104, 7, 8, 30, 0 // DMA Channel 10
1166 #if (defined(_DMA11IF))
1181 #define ESOS_IRQ_PIC24_DMA11 _DMA11Interrupt, 0x0106, 7, 9, 30, 4 // DMA Channel 11
1184 #if (defined(_DMA12IF))
1199 #define ESOS_IRQ_PIC24_DMA12 _DMA12Interrupt, 0x0118, 8, 2, 32, 8 // DMA Channel 12
1202 #if (defined(_DMA13IF))
1217 #define ESOS_IRQ_PIC24_DMA13 _DMA13Interrupt, 0x011A, 8, 3, 32, 12 // DMA Channel 13
1220 #if (defined(_DMA14IF))
1235 #define ESOS_IRQ_PIC24_DMA14 _DMA14Interrupt, 0x011C, 8, 4, 33, 0 // DMA Channel 14
1241 #if (defined(_SPI1IF))
1256 #define ESOS_IRQ_PIC24_SPI1 _SPI1Interrupt, 0x0028, 0, 10, 2, 8 // SPI1 event
1272 #define ESOS_IRQ_PIC24_SPI1E _SPI1ErrInterrupt, 0x0026, 0, 9, 2, 4 // SPI1 (exception) fault event
1275 #if (defined(_SPI2F))
1290 #define ESOS_IRQ_PIC24_SPI2 _SPI2Interrupt, 0x0056, 2, 1, 8, 4 // SPI2 Transfer Done
1305 #define ESOS_IRQ_PIC24_SPI2E _SPI2ErrInterrupt, 0x0054, 2, 0, 8, 0 // SPI2 Error
1308 #if (defined(_SPI3F))
1323 #define ESOS_IRQ_PIC24_SPI3 _SPI3Interrupt, 0x00CA, 5, 11, 22, 12 // SPI3 Transfer Done
1338 #define ESOS_IRQ_PIC24_SPI3E _SPI3ErrInterrupt, 0x00C8, 5, 10, 22, 8 // SPI3 Error
1341 #if (defined(_SPI4F))
1356 #define ESOS_IRQ_PIC24_SPI4 _SPI4Interrupt, 0x010A, 7, 11, 30, 12 // SPI4 Transfer Done
1371 #define ESOS_IRQ_PIC24_SPI24 _SPI4ErrInterrupt, 0x0108, 7, 10, 30, 8 // SPI4 Error
1380 #if !defined(_ESOS_PIC24_RS232_H) || defined(__DOXYGEN__)
1396 #define ESOS_IRQ_PIC24_U1TX _U1TXInterrupt, 0x002C, 0, 12, 3, 0 // UART1 TX event
1412 #define ESOS_IRQ_PIC24_U1RX _U1RXInterrupt, 0x002A, 0, 11, 2, 12 // UART1 RX event
1429 #define ESOS_IRQ_PIC24_U1E _U1ErrInterrupt, 0x0096, 4, 1, 16, 4 // UART1 Error event
1430 #endif // end of UART1 constants
1432 #if (defined(_U2TXIF))
1447 #define ESOS_IRQ_PIC24_U2TX _U2TXInterrupt, 0x0052, 1, 15, 7, 12 // UART2 Transmitter
1462 #define ESOS_IRQ_PIC24_U2RX _U2RXInterrupt, 0x0050, 1, 14, 7, 8 // UART2 Receiver
1477 #define ESOS_IRQ_PIC24_U2E _U2ErrInterrupt, 0x0098, 4, 2, 16, 8 // UART2 Error Interrupt
1480 #if (defined(_U3TXIF))
1495 #define ESOS_IRQ_PIC24_U3TX _U3TXInterrupt, 0x00BA, 5, 3, 20, 12 // UART3 Transmitter
1510 #define ESOS_IRQ_PIC24_U3RX _U3RXInterrupt, 0x00B8, 5, 2, 20, 8 // UART3 Receiver
1525 #define ESOS_IRQ_PIC24_U3E _U3ErrInterrupt, 0x00B6, 5, 1, 20, 4 // UART3 Error Interrupt
1528 #if (defined(_U4TXIF))
1543 #define ESOS_IRQ_PIC24_U4TX _U4TXInterrupt, 0x00C6, 5, 9, 22, 4 // UART4 Transmitter
1558 #define ESOS_IRQ_PIC24_U4RX _U4RXInterrupt, 0x00C4, 5, 8, 22, 0 // UART4 Receiver
1573 #define ESOS_IRQ_PIC24_U4E _U4ErrInterrupt, 0x00C2, 5, 7, 21, 12 // UART4 Error Interrupt
1579 #if (defined(_AD1IF))
1594 #define ESOS_IRQ_PIC24_AD1 _ADC1Interrupt, 0x002E, 0, 13, 3, 4 // AD1 Conversion complete
1596 #if (defined(_AD2IF))
1611 #define ESOS_IRQ_PIC24_AD2 _ADC2Interrupt, 0x003E, 1, 5, 5, 4 // AD2 Conversion complete
1622 #if (defined(_I2C1IF))
1637 #define ESOS_IRQ_PIC24_MI2C1 _MI2C1Interrupt, 0x0036, 1, 1, 4, 4 // I2C1 Master event
1652 #define ESOS_IRQ_PIC24_SI2C1 _SI2C1Interrupt, 0x0034, 1, 0, 4, 0 // I2C1 slave event
1655 #if (defined(_I2C2IF))
1670 #define ESOS_IRQ_PIC24_MI2C2 _MI2C2Interrupt, 0x0078, 3, 2, 12, 8 // I2C2 Master event
1685 #define ESOS_IRQ_PIC24_SI2C2 _SI2C2Interrupt, 0x0076, 3, 1, 12, 4 // I2C2 slave event
1691 #if (defined(_CMIF))
1706 #define ESOS_IRQ_PIC24_CM _CMInterrupt, 0x0038, 1, 2, 4, 8 // Comparator Combined Event
1712 #if (defined(_CNIF))
1727 #define ESOS_IRQ_PIC24_CN _CNInterrupt, 0x003A, 1, 3, 4, 12 // Input Change Interrupt
1733 #if (defined(_C1IF))
1748 #define ESOS_IRQ_PIC24_C1 _C1Interrupt, 0x005A, 2, 3, 8, 12 // CAN1 Event
1763 #define ESOS_IRQ_PIC24_C1TX _C1TXInterrupt, 0x00A0, 4, 6, 17, 8 // CAN1 TX Data Request
1778 #define ESOS_IRQ_PIC24_C1RX _C1RXInterrupt, 0x0058, 2, 2, 8, 8 // CAN1 RX Data Ready
1781 #if (defined(_C2IF))
1796 #define ESOS_IRQ_PIC24_C2 _C2Interrupt, 0x0084, 3, 8, 14, 0 // CAN2 Event
1811 #define ESOS_IRQ_PIC24_C2TX _C2TXInterrupt, 0x00A2, 4, 7, 17, 12 // CAN2 TX Data Request
1826 #define ESOS_IRQ_PIC24_C2RX _C2RXInterrupt, 0x0082, 3, 7, 13, 12 // CAN2 RX Data Ready
1838 #if (defined(_PSEMIF))
1853 #define ESOS_IRQ_PIC24_PSEM _PSEMInterrupt, 0x0086, 3, 9, 14, 4 // PWM Special Event Match
1858 #if (defined(_PWM1IF))
1873 #define ESOS_IRQ_PIC24_PWM1 _PWM1Interrupt, 0x00D0, 5, 14, 23, 8
1876 #if (defined(_PWM2IF))
1891 #define ESOS_IRQ_PIC24_PWM2 _PWM2Interrupt, 0x00D2, 5, 15, 23, 12
1894 #if (defined(_PWM3IF))
1909 #define ESOS_IRQ_PIC24_PWM3 _PWM3Interrupt, 0x00D4, 6, 0, 24, 0
1912 #if (defined(_PWM4IF))
1927 #define ESOS_IRQ_PIC24_PWM4 _PWM4Interrupt, 0x00D6, 6, 1, 24, 4
1930 #if (defined(_PWM5IF))
1945 #define ESOS_IRQ_PIC24_PWM5 _PWM5Interrupt, 0x00D8, 6, 2, 24, 8
1948 #if (defined(_PWM6IF))
1963 #define ESOS_IRQ_PIC24_PWM6 _PWM6Interrupt, 0x00DA, 6, 3, 24, 12
1966 #if (defined(_PWM7IF))
1981 #define ESOS_IRQ_PIC24_PWM7 _PWM7Interrupt, 0x00DC, 6, 4, 25, 0
1987 #if (defined(_QEI1IF))
2002 #define ESOS_IRQ_PIC24_QEI1 _QEI1Interrupt, 0x0088, 3, 10, 14, 8
2005 #if (defined(_QEI2IF))
2020 #define ESOS_IRQ_PIC24_QEI2 _QEI2Interrupt, 0x00AA, 4, 11, 18, 12
2027 #if (defined(_USB1IF))
2033 #if (defined(_RTCIF))
2048 #define ESOS_IRQ_PIC24_RTC _RTCInterrupt, 0x0090, 3, 14, 15, 8 // RTCC Interrupt
2055 #if (defined(_CRCIF))
2070 #define ESOS_IRQ_PIC24_CRC _CRCInterrupt, 0x009A, 4, 3, 16, 12 // CRC Generator Interrupt
2079 #define ESOS_IRQ_PIC24_CRC _CRCInterrupt, 0x009A, 4, 3, 16, 12 // CRC Generator Interrupt
2080 #define ESOS_IRQ_PIC24_CTMU _CTMUInterrupt, 0x00AE, 4, 13, 19, 4 // CTMU Interrupt
2081 #define ESOS_IRQ_PIC24_ICD _ICDInterrupt, 0x0142, 8, 14, 35, 8 // ICD Application
2082 #define ESOS_IRQ_PIC24_JTAG _JTAGInterrupt, 0x0130, 8, 15, 35, 12 // JTAG Programming
2083 #define ESOS_IRQ_PIC24_PTGSTEP _PTGSTEPInterrupt, 0x0136, 9, 1, 36, 4 // PTG Step
2084 #define ESOS_IRQ_PIC24_PTGWDT _PTGWDTInterrupt, 0x0138, 9, 2, 36, 8 // PTG Watchdog Time-out
2085 #define ESOS_IRQ_PIC24_PTG0 _PTG0Interrupt, 0x013A, 9, 3, 36, 12 // PTG Interupt 0
2086 #define ESOS_IRQ_PIC24_PTG1 _PTG1Interrupt, 0x013C, 9, 4, 37, 0 // PTG Interrupt 1
2087 #define ESOS_IRQ_PIC24_PTG2 _PTG2Interrupt, 0x013E, 9, 5, 37, 4 // PTG Interrupt 2
2088 #define ESOS_IRQ_PIC24_PTG3 _PTG3Interrupt, 0x0140, 9, 6, 37, 8 // PTG Interrupt 3
2095 #define __GET_IRQ_ATTRIB(Q) __xGET_IRQ_ATTRIB(Q)
2096 #define __GET_IVTQ(Q) __xGET_IVT(Q)
2097 #define __GET_IFS_NUM(Q) __xGET_IFS_NUM(Q)
2098 #define __GET_IFS_BITNUM(Q) __xGET_IFS_BITNUM(Q)
2099 #define __GET_IEC_NUM(Q) __xGET_IFS_NUM(Q)
2100 #define __GET_IEC_BITNUM(Q) __xGET_IFS_BITNUM(Q)
2101 #define __GET_IPC_NUM(Q) __xGET_IPC_NUM(Q)
2102 #define __GET_IPC_BITNUM(Q) __xGET_IPC_BITNUM(Q)
2104 #define __xGET_IRQ_ATTRIB(attrib, ivt, ifsr, ifsb, ipcr, ipcb) attrib
2105 #define __xGET_IVT(attrib, ivt, ifsr, ifsb, ipcr, ipcb) ivt
2106 #define __xGET_IFS_NUM(attrib, ivt, ifsr, ifsb, ipcr, ipcb) ifsr
2107 #define __xGET_IFS_BITNUM(attrib, ivt, ifsr, ifsb, ipcr, ipcb) ifsb
2108 #define __xGET_IEC_NUM(attrib, ivt, ifsr, ifsb, ipcr, ipcb) ifsr
2109 #define __xGET_IEC_BITNUM(attrib, ivt, ifsr, ifsb, ipcr, ipcb) ifsb
2110 #define __xGET_IPC_NUM(attrib, ivt, ifsr, ifsb, ipcr, ipcb) ipcr
2111 #define __xGET_IPC_BITNUM(attrib, ivt, ifsr, ifsb, ipcr, ipcb) ipcb
2115 #define __GET_IPL_FROM_IPCX(Q) ((*(&IPC0+(__xGET_IPC_NUM(Q))) >> __xGET_IPC_BITNUM(Q))&0x7)
2119 #define __IS_IPL_FROM_IPCX(Q, val) ((__GET_IPL_FROM_IPCX(Q))==(val))
2122 #define __PUT_IPL_INTO_IPCX(ipc,ipcb,ipl) \
2124 BIT_CLEAR_MASK( *(&IPC0+(ipc)), 0x07<<ipcb) + (ipl<<ipcb); \
2125 *(&IPC0+ipc) += (ipl<<ipcb); \
2144 #define ESOS_UNREGISTER_PIC24_USER_INTERRUPT(desc) __xUNREGISTER_PIC24_USER_INTERRUPT(desc)
2145 #define __xUNREGISTER_PIC24_USER_INTERRUPT(attrib, ivt, ifsr, ifsb, ipcr, ipcb) \
2147 __xDISABLE_PIC24_USER_INTERRUPT(attrib, ivt, ifsr, ifsb, ipcr, ipcb); \
2148 __PUT_IPL_INTO_IPCX(ipcr,ipcb, __ESOS_USER_IRQ_UNREGISTERED); \
2171 #define ESOS_REGISTER_PIC24_USER_INTERRUPT(desc, ipl, p2f) __xREGISTER_PIC24_USER_INTERRUPT(desc, ipl, p2f)
2172 #define __xREGISTER_PIC24_USER_INTERRUPT(attrib, ivt, ifsr, ifsb, ipcr, ipcb, ipl, p2f) \
2174 __xDISABLE_PIC24_USER_INTERRUPT(attrib, ivt, ifsr, ifsb, ipcr, ipcb); \
2175 __PUT_IPL_INTO_IPCX(ipcr, ipcb, ipl); \
2193 #define ESOS_DISABLE_ALL_PIC24_USER_INTERRUPTS() SET_CPU_IPL(__ESOS_DISABLE_USER_IRQS_LEVEL)
2209 #define ESOS_ENABLE_ALL_PIC24_USER_INTERRUPTS() SET_CPU_IPL(__ESOS_ENABLE_USER_IRQS_LEVEL)
2229 #define ESOS_IS_PIC24_USER_INTERRUPT_ENABLED(desc) __xIS_PIC24_USER_INTERRUPT_ENABLED(desc)
2230 #define __xIS_PIC24_USER_INTERRUPT_ENABLED(attrib, ivt, ifsr, ifsb, ipcr, ipcb) IS_BIT_SET(*(&IEC0+ifsr),ifsb)
2250 #define ESOS_DOES_PIC24_USER_INTERRUPT_NEED_SERVICING(desc) __xDOES_PIC24_USER_INTERRUPT_NEED_SERVICING(desc)
2251 #define __xDOES_PIC24_USER_INTERRUPT_NEED_SERVICING(attrib, ivt, ifsr, ifsb, ipcr, ipcb) IS_BIT_SET(*(&IFS0+ifsr), ifsb)
2269 #define ESOS_MARK_PIC24_USER_INTERRUPT_SERVICED(desc) __xMARK_PIC24_USER_INTERRUPT_SERVICED(desc)
2270 #define __xMARK_PIC24_USER_INTERRUPT_SERVICED(attrib, ivt, ifsr, ifsb, ipcr, ipcb) BIT_CLEAR(*(&IFS0+ifsr),ifsb)
2288 #define ESOS_ENABLE_PIC24_USER_INTERRUPT(desc) __xENABLE_PIC24_USER_INTERRUPT(desc)
2289 #define __xENABLE_PIC24_USER_INTERRUPT(attrib, ivt, ifsr, ifsb, ipcr, ipcb) BIT_SET(*(&IEC0+ifsr), ifsb)
2307 #define ESOS_DISABLE_PIC24_USER_INTERRUPT(desc) __xDISABLE_PIC24_USER_INTERRUPT(desc)
2308 #define __xDISABLE_PIC24_USER_INTERRUPT(attrib, ivt, ifsr, ifsb, ipcr, ipcb) BIT_CLEAR(*(&IEC0+ifsr), ifsb)
2310 #endif // ESOS_PIC24_IRQ_H